Operating memory devices (e.g., random access memories, dynamic memories, static memories, caches, buffers, etc.) are often employed by computing devices for storing run-time data, executable instructions, and other information. Such memory devices are fairly reliable, and generally support relatively high speed operation of the computing device. However, memory errors may occasionally occur due, for example, to faulty memory cells, other hardware problems, out-of-specification operation, environmental conditions, and other issues.
Various reliability schemes have been developed for detecting and/or mitigating the effect of errors in operating memory devices. For example, computing devices and/or operating memory devices may employ parity bits to detect memory errors, or computing and/or operating memory devices may employ an error correction code (ECC) to correct memory errors. However, in conventional technology, the reliability scheme employed by a computing device depends directly on the hardware configuration of that device, and does not change once that device is deployed.